Regviz

Silicon Labs /BGM240PB32VNA /SYSCFG_NS /RAMBIASCONF

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as RAMBIASCONF

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Silicon Labs/EFR32MG24A120F1536GM48/SYSCFG_NS/RAMBIASCONF#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (No)RAMBIASCTRL

RAMBIASCTRL=No

Description

Configure RAM bias configure bits.

Fields

RAMBIASCTRL

RAM Bias Control

0 (No): None

1 (VSB100): Voltage Source Bias 100mV

2 (VSB200): Voltage Source Bias 200mV

4 (VSB300): Voltage Source Bias 300mV

8 (VSB400): Voltage Source Bias 400mV

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data